X86 cpus' Guide

 Search (OK)

 

Statistics
Collections : 20230  cpu
Known : 9550  cpu
For sale : 245  cpu
Pictures : 24812  photos
 Add to favorites
 Homepage
Site map Site map

Franc¸ais  English  Dutch   

 Log in
 Register

Processor of the day

AMD Athlon Slot A 550 (Model 1) 01.jpg
AMD Athlon 550 (Model 1)

Most popular CPUs

Intel Core 2 Duo E8800 (ES)
Intel Core 2 Duo E6200 (ES)
Intel Core 2 Duo E7700
Intel Core 2 Duo E7800
Intel Pentium II 266 (0,35µ)

Intel Core i7-3770
Intel Core i7-6700
Intel Core i5-3470
Intel Core i5-4570
Intel Core i5-6500

Most powerful CPUs
Desktop PCs
AMD : Ryzen Threadripper 3990X
Intel : Core i9-10980XE
Laptop PCs
AMD : Ryzen 9 4900H
Intel : Core i9-10980HK
Servers
AMD : EPYC 7H12
Intel : Xeon Platinium 9282

Other articles > X86 Glossary > BMI

Bit Manipulation Instructions Sets (BMI sets) are extensions to the x86 instruction set architecture for microprocessors from Intel and AMD. The purpose of these instruction sets is to improve the speed of bit manipulation. All the instructions in these sets are non-SIMD and operate only on general-purpose registers. There are two sets published by Intel: BMI (here referred to as BMI1) and BMI2; they were both introduced with the Haswell microarchitecture. Another two sets were published by AMD: ABM (Advanced Bit Manipulation, which is also a subset of SSE4a implemented by Intel as part of SSE4.2 and BMI1), and TBM (Trailing Bit Manipulation, an extension introduced with Piledriver-based processors as an extension to BMI1, but dropped again in Zen-based processors).


Used for : AMD APU, AMD Athlon, AMD EPYC, AMD FX, AMD Opteron, AMD Ryzen, AMD Sempron, Intel Celeron, Intel Core i3, Intel Core i5, Intel Core i7, Intel Core i9, Intel Core M, Intel Pentium, Intel Xeon