Bit Manipulation Instructions Sets (BMI sets) are extensions to the x86 instruction set architecture for microprocessors from Intel and AMD. The purpose of these instruction sets is to improve the speed of bit manipulation. All the instructions in these sets are non-SIMD and operate only on general-purpose registers. There are two sets published by Intel: BMI (here referred to as BMI1) and BMI2; they were both introduced with the Haswell microarchitecture. Another two sets were published by AMD: ABM (Advanced Bit Manipulation, which is also a subset of SSE4a implemented by Intel as part of SSE4.2 and BMI1), and TBM (Trailing Bit Manipulation, an extension introduced with Piledriver-based processors as an extension to BMI1, but dropped again in Zen-based processors).
Used for : AMD APU, AMD Athlon, AMD EPYC, AMD FX, AMD Opteron, AMD Ryzen, AMD Sempron, Intel , Intel Celeron, Intel Core i3, Intel Core i5, Intel Core i7, Intel Core i9, Intel Core M, Intel Core i3, Intel Core i5, Intel Core i7, Intel Pentium, Intel Xeon, VIA Nano