Before talking about the VIA C3, we must first address the history, or rather the end of the history of Cyrix and Centaur, in order to better understand where this series of processors came from, and why it was named at the start Cyrix III .
At the end of the 90s, VIA was a Taiwanese company recognized for its many quality chipsets, essential or almost for AMD platforms, but which also offered very credible alternatives on Intel platforms.
In order to continue to grow in the ever-expanding personal computer market, VIA saw Cyrix's financial difficulties as an opportunity for a takeover, which would allow it to enter fully into the noblest of markets, that of microprocessors.
The takeover was confirmed in August 1999. Cyrix was at the time developing a sucessor for its MII processors, which unfortunately did not meet the same success as their predecessors, the 6x86 and 6x86MX on which they were directly based.
Indeed, the competition had seriously increased since the release of the first 6x86s, and while the latter only had Intel's Pentiums and AMD's K5s up front, the MIIs had to face, on the Intel side, the most powerful Pentium MMXs, which reached 233MHz, as well as the first Pentium IIs and the first Celerons on the entry-level market, and on the AMD side, back from afar, to the formidable K6 and the first K6-2.
This grip both from the top on the performance side, and from the bottom on the price side, was certainly an accelerator of the downfall of Cyrix, unable to renew itself quickly enough to offer products that were both cheap and efficient.
Especially since since its takeover by National Semiconductors in August 1997, the latter wanted rather to prioritize the designs of the type of MediaGX, which seemed to them to be the future.
Still, when VIA bought Cyrix from National Semiconductors, they cancelled all the projects in progress, except the one based on Cayenne core, at the time named Gobi, and which would be renamed by VIA as Joshua .
Unfortunately, the project had taken a lot of delay in its development and its performance was below expectations, for a very high power consumption, at least too high compared to VIA's objectives.
However, in February 2000, VIA nevertheless announced the release of two models, PR500 & PR533 , respectively at $84 & $99 per quantity of 1000. A priori, it was only a paper launch, because no processor was really put on the market...
And at the same time, VIA had made another major acquisition, which had a design that was much more mature and more efficient in every way.
Also with a view to enter the microprocessor market, VIA also acquired Centaur, the x86 microprocessor division of IDT. The acquisition was finalized less than a month after that of Cyrix, in September 1999.
Why buy two competing divisions, already working for some time on the successors of their processors then on sale ? Most likely because VIA had felt or knew that Cyrix could not do much for them at the processor level, but on the other hand had a name that was still very popular. While Centaur them, failing to have popular processors (Winchip sales were quite confidential at that time), had in their boxes a project much more developed than the Gobi / Joshua of Cyrix, and especially more in line with the spirit that VIA wanted for its future processors. Namely, processors powerful enough to run basic office applications, very efficient from the point of view of power consumption, simple and inexpensive, which was the case with Winchip 4. But not the Winchip 3, which was almost ready for release when VIA took over, but which was only a slight evolution of the Winchip 2. VIA put an end to them and asked Centaur to adapt the Winchip 4 , codename C4, originally intended for Socket 7, to the new Socket 370 used by Intel.
This new core was renamed Samuel (VIA liked the Hebrew prophets, we saw it with Joshua, and we will see it later also with the successors of Samuel) or C5A to be more serious and to follow the C4 which was the Winchip 4 original, and was released in June 2000, barely ten months after the takeover of VIA.
Which was still a big achievement if we consider that Centaur did not start to work on adapting the Winchip 4 to socket 370 very long before their acquisition.
It was named Cyrix III, even though it had nothing to do with any design of a Cyrix team, and ran at 500MHz. It was made using a 0.18┬Ám process, by TSMC (the C4 was initially planned with 0.25┬Ám process, still from TSMC, but a 0.18┬Ám shrink was already planned for the first half of 2000 : VIA therefore went directly to shrink), and vestige of its original destination for Socket 7, did not have any L2 cache (socket 7 motherboards were the last ones to support external L2 cache, socket 370 been intended for processors with internal L2 cache). As with the early Celeron Covingtons, the result was that the processor offered fairly poor performance.
Especially since in addition to this shortcoming, the processor had an FPU which was clocked only at half the frequency of the CPU ! Not easy at a time when FPU performance was the key to a successful processor...
Despite the price, despite the increase in frequency, which nevertheless reached up to 800MHz, with such performance, VIA did not find its audience and this first core was a semi-failure. Semi because it opened the door to VIA in the x86 processor market, a door that would remain open for many years.
If the Samuel core, first of the name, had some shortcomings, it was due in a large part to the lack of L2 cache. It is quite probable that VIA released this processor as is with full knowledge of this weakness, in order to occupy the market as quickly as possible, and at the same time immediately asked its teams to rework this core to improve its performance, in particular by adding an L2 cache.
A year later, in 2001, VIA therefore released a new processor, based on the Samuel 2 or C5B core, a Samuel core with 64Kb of L2 cache and engraved with a fineness reduced to 0.15┬Ám. They simply called it VIA C3, giving up in the process, now that they had made a (small) place in the microprocessor market, the name Cyrix, to keep only the first letter.
Despite the low amount of cache, half of the Mendocino Celerons released more than two years before, the performance was ultimately not that bad, thanks to a very simple design that relied on efficient branch prediction, and allowed to use office applications without any problem, and even a little gaming.
The power consumption, already very low on Samuel heart, were even lower, thanks to the 0.15┬Ám manufacturing technology. And although we would have expected that this new core, thanks to this process, would reach frequencies higher than that of the first Samuel, it was nothing in the end, and it remained stuck, like its unfortunate ancestor, at 800MHz, before being in turn replaced by a new improvement, the Ezra core.
Appeared only a few months after Samuel 2, the Ezra (yet another prophet) or C5C core was in practice a die-shrink in 0.13┬Ám and which was intended to significantly increase the frequencies and therefore the performance of VIA C3, without however increase their power consumption or heat dissipation. The frequencies therefore started at 800MHz, where the Samuel 1 & 2 had stopped, and went up to 933MHz. Only 133 more small MHz.
Why did they not reach the GHz? Because before reaching this frequency, they were replaced by the Ezra-T in 2002, a variant that used the same bus as the Tualatin from Intel. And these finally reached the GHz, 2 years after AMD and Intel, before being replaced again, a year later, in 2003, by an umpteenth iteration of the C5, but which this time brought real changes compared to the initial C5A.
Baptized Nehemiah or C5XL, this core had nothing to do with its predecessors. VIA would very well have called it another way, but they didn't, probably because it was still compatible with the now aging Socket 370, abandoned for more than three years by Intel.
It fixed performance issues with the FPU, which was finally running at the same frequency as the CPU and reaching even higher frequencies, up to 1.4GHz . The instruction pipeline was increased from 12 to 16 stages, Intel's SSE instructions were added, and AMD's 3DNow were removed, saving space and consumption.
Still made using TSMC's 0.13┬Ám process, like the last Ezra-T, it consumed a little more power, because of increased frequencies. But it consumed almost half as much as its direct competitors, the Durons and Celeron, while offering almost equivalent performance.
16 Nehemiah steppings were made, the first eight (0-7) corresponding to C5XL.
From stepping 8, also known as C5P, VIA introduced new features that would later be found in all VIA processors, then all those of competitors as well, namely AES hardware encryption that VIA'smarketing teams nicknamed VIA Padlock .
VIA Padlock also included one or two units (one on the C5XLs, two on the C5P) of Random Number Generator (RNG).
Despite these additions, VIA managed to reduce the size of the C5Ps slightly compared to the C5XL, probably compensating for them by reducing the number of L1 cache ways from 4 to 2.
Like some Samuel 2 and Ezra, the Nehemiah core was also released in BGA format, intended for the laptop processors market, but not only, the format allowing to reduce costs, without a socket , for any desktop PC or other set-top box.
But the dies were identical to the Desktop version : same voltage, same consumption. In order to provide an commercial offer specifically labeled "Mobile", VIA released the Antaur in July 2003 . It was a C3 Nehemiah with reduced voltage and consumption (1.25V and 11W, instead of 1.40V and 15W) and having version 2.0 of VIA's Powersaver functionality . Only one Antaur at 1GHz was released.
Because from September 2004, at the same time as they released their C7 & C7-M, VIA renamed the Antaurs to C3-M, and completed the range of models up to 1.4GHz, with a 1GHz LV model operating at a voltage as low as 1.05V (for a consumption of 7W only!).
This marked the end of the C3, but not of the Nehemiah core, which continued his career a little longer, through the Eden-Ns.