Intel Core 2 Duo E8800 (ES)
Intel Core 2 Duo E6200 (ES)
Intel Core 2 Duo E7700
Intel Pentium II 266 (0,35µ)
Intel Core 2 Duo E7800
AMD EPYC 3401
|
|||
Manufacturer | AMD | ||
Model | EPYC | ||
Architecture | x86 | ||
Codename | Snowy Owl | ||
Core frequency (Rated/Boost) | 1.85 GHz/3 GHz | ||
Cores/Threads | 16/32 | ||
Targeted market | Embedded devices | ||
Package | SP4 | ||
Physical informations | |||
Package Size | 4,5x4,5 cm | Manufacturing process | 14 nm |
Die size | 2x213 mm² | Transistor count | 2x4800000000 |
Electrical informations | |||
Voltage | ??? | TDP | 85 W |
Bus frequency | |||
Bus type | PCI-Express 3.0 | Width | 64 bits |
Caches | |||
L1 cache (data) | 16x32 KB | L1 Cache (instruction) | 16x64 KB |
L2 cache | 16x512 KB | L3 cache | 32 MB |
Other informations | |||
Release date | February 21th 2018 | ||
Functions/Features |
16-bit Floating-Point conversion instructions (F16C) 3-operand Fused Multiply-Add instructions (FMA3) Advanced Vector Extensions (AVX) Advanced Vector Extensions 2 (AVX2) AES New Instructions BMI Enhanced Virus Protection (EVP) MMX Pacifica Precision Boost 2 Pure Power Secure Hash Algorithm extensions (SHA) Secure Mode Execution Protection (SMEP) Simultaneous MultiThreading (SMT) SSE SSE2 SSE3 SSE4.1 SSE4.2 SSE4a SSSE3 Supervisor Mode Access Prevention (SMAP) x86-64 instructions |
||
Integrated peripherals |
8 10Gb Ethernet Controller SMBus Host controller I2C Controller DDR4-2666 Memory controller Quad Channel 64 lignes PCI-Express 3.0 Controller Serial-ATA 3.0 controller USB3.0 Host controller Horloge temps réel LPC interface SPI Interface General Purpose I/O pins High Speed UART |
||
Rarity | |||
In collection ? | no | ||
Benchmarks |