CPUs > AMD > Turion > K10 Architecture

AMD Turion II P520
Manufacturer	AMD
Model	Turion
Architecture	x86
Codename	Champlain
Core frequency	2.3 GHz
Cores/Threads	2/2
Targeted market	Laptop PCs
Package / Socket	µPGA-638 / Socket S1 (S1g4)
Physical informations
Package Size	3,5x3,5 cm	Manufacturing process	45 nm
Die size	117,5 mm²	Transistor count	234000000
Electrical informations
Voltage	???	TDP	25 W
Bus frequency
Bus type	Hypertransport 3.0	Width	64 bits
Base clock	2x200 MHz	Core/Bus ratio	11.5x
Bus speed Hypertransport 3.0	1.8 GHz
Caches
L1 cache (data)	2x64 KB	L1 Cache (instruction)	2x64 KB
L2 cache	2x1024 KB	L3 cache	-
Other informations
Release date	May 12th 2010
Functions/Features	Dual Core Enhanced 3DNow! Enhanced Virus Protection (EVP) Execute Disable Bit HyperTransport 3.0 Technology Low Power MMX Pacifica PowerNow! SSE SSE2 SSE3 SSE4a x86-64 instructions
Integrated peripherals	DDR3-1066 Memory controller Dual Channel
Part Number	TMP520SGR23GM (OEM, C3)
Rarity
In collection ?	yes, in 3 Collections : Mixeur, Xhoba, GamingElliot.
Benchmarks

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